TI, its suppliers and providers of content reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice. Apr 27, 5: Couldn’t find phydev macb eb How u-boot passes information about 2 PHY to linux? Same for the local-mac-address. If you are experiencing one of the following problems, then you probably have an issue with your RGMII interface:

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Shawn, Looks like eth. You can use u-boot’s mdio utility.

This page was last edited on 19 Novemberat The original MII design has been extended to support reduced signals and increased speeds. Post as a guest Name. This thread has been locked. Do you have another question?

Both paths have an independent clock, 4 rgmi signals and a control signal.

configure linux kernel for RGMII

How this is handled depends on whether you are running Linux or a stand-alone application. Mentions Tags More Cancel. Since you have a similar thread on this issue opened inside the Sitara forum, I’ll try to keep the discussion there: It contains a bitmask with the following meaning: If you have a related question, please click the ” Ask a related question ” button in the top right corner.


Retrieved from ” https: There are also many more varieties of interfaces used in other circumstances, may of which are linked to from the Wikipedia MII page: Why ,inux have to set the phy interface to rgmii-id? TTL signal levels are used for 5 V or 3. This requires the PCB to be designed to add a 1. Archived from the original on Egmii 20 April It does this by clock forwarding a clock with a 90 degrees phase shift with respect to the clock that is used to output the data signals.

In reply to Stanislav Stilyanov: No license, either express or implied, by estoppel or otherwise, is granted by TI. Based on them I have changed my device tree and now kernel detects the phy Instead of the Marvell phy Rfmii am using Micrel but xgmiitorgmii is giving some problems as I see in the kernel log: I’ve read many forum posts, and all show different device tree nodes.

The Rgnii clock delay is enabled by setting bit 4 of register 21 of page 2.

All content and materials on this site are provided “as is”. PHY – physical layer – converts a stream of bytes from the MAC into signals on one or more wires or fibres.


configure linux kernel for RGMII – Linux forum (Read-Only) – Linux (Read-Only) – TI E2E Community

The RMII signals are treated as lumped signals rather than transmission lines; no termination or controlled impedance is necessary; output drive and thus slew rates need to be as slow as possible rise times from 1—5 ns to permit this. Below is an example of doing this for each of the lnux possible configurations.

I try it but nothing changes. I having similar issues you have. Go to Support forums.

[1/2] Documentation: devicetree: clarify usage of the RGMII phy-modes – Patchwork

The receiver clock is much simpler, with only one clock, which is recovered from the incoming data. This may be used to abort a frame when some problem is detected after transmission has already started.

The right-side image below shows the clock and data signals grmii clock skew has been added.